General Drawing

• Full hierarchical design is supported with unlimited circuit size and nesting depth. Powerful command set allows top-down or bottom-up design. Multiple hierarchy modes allow for PCB, FPGA and VLSI designs.
• Standard ANSI sheet sizes or fully customized borders can be used with up to 1,000 pages per circuit level. Each page is displayed in a separate window with independent control of pan and zoom. Objects can be drawn in user-selectable colors on machines with color support. Any number of circuit windows and hierarchy levels can be open simultaneously, allowing easy copying of partial or complete diagrams from one file to another.
• Connectivity is maintained at all times between signals connected by name, bus, or page connector and can be traced up and down through the hierarchy. Connection dots, end markers and page references are updated automatically. Busses and bus pins on device symbols are supported allowing a single pin connection to represent an arbitrary collection of internal signals. Powerful Find and ErrorFind tools locate objects by name, attribute or error condition.
• A powerful text attributes feature allows arbitrary text data to be associated with any design, device, signal or pin. Over 50 fields are predefined for common items such as part name, component value, gate unit, etc. Custom fields can be added by the user at any time. Attribute text can be displayed, moved, rotated and edited right on the schematic with global control of text style. An "attribute probe" feature allows quick viewing of device or signal data with a mouse click.
• Device packaging is supported for multi-gate devices. An auto-packaging mode assigns names and pin numbers to devices as they are placed on the diagram. Batch mode allows complete reassignment of packages to the entire design. Various locking and error checking options give full control over the packaging process.

• DesignWorks includes an extensive set of libraries totaling over 13,000 symbols in both ANSI rectangular and IEEE formats. Includes all 54xx and 74xx families, CMOS, ECL, Memories, Microprocessors and discretes. All symbols include gate package information, functional descriptions and other information.
• On-screen parts palette with string search option allows quick selection of parts for placement.
• Integrated device symbol editor allows quick creation of new library entries. Standard drawing tools are available plus an "auto-create" command which will generate standard symbols in seconds.

• The integrated report generation facility produces standard or custom-formatted net and component lists from DesignWorks circuit files. Hierarchical netlists are also supported and can be written out in nested or flattened format. Common PCB and simulation netlist formats are supported. Others may be easily created with the report form scripting language.
• Back annotation is supported for a number of common formats and includes device rename, gate swap and pin-swap operations.

General Drawing

• Full hierarchical design is supported with unlimited circuit size and nesting depth. Powerful command set allows top-down or bottom-up design. Multiple hierarchy modes allow for PCB, FPGA and VLSI designs.
• Standard ANSI sheet sizes or fully customized borders can be used with up to 1,000 pages per circuit level. Each page is displayed in more...